| COURSE | TITLE | EFF YEAR | EFF TERM | DEPARTMENT | CREDIT HOURS | ||||
| EE360 | DIGITAL LOGIC W/ EMBEDDED SYS | 2014 | 1 | Electrical Engineering and Computer Science | 3.5 (BS=0.0, ET=3.5, MA=0.0) | ||||
| SCOPE | |||||||||
| This course covers the analysis, design, simulation, and construction of digital logic circuits and embedded systems. The material in this course provides the necessary tools to design digital hardware circuits based on design techniques such as Karnaugh maps and Finite State Machines. The course begins with the study of binary and hexadecimal number systems, Boolean algebra, and their application to the design of combinational logic circuits. The first half of the course focuses on designs using medium-scale integration (MSI) circuits and Field Programmable Gate Arrays (FPGAs) to implement combinational logic functions. The second half of the course emphasizes sequential logic circuits. Laboratory work in this half of the course focuses on using very high speed integrated circuit hardware description language (VHDL) to simulate digital systems and to program those systems in hardware. As a final project, cadet teams design, build, and test a digital logic system. | |||||||||
|
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| SPECIAL REQUIREMENTS: | |||||||||
| A two-part design project (0.5 design credits). | |||||||||
| TYPE | COURSE | EFF YEAR | EFF TERM | TRACK | RED BOOK FLG |
| DISQUALIFIER | |||||
| EE300 | 2004 | 1 | 1 | Y | |
| PRE REQUISITE | |||||
| CS105 | 1990 | 1 | 1 | Y | |
| CS155 | 1990 | 1 | 2 | Y | |
| IT105 | 2003 | 1 | 3 | Y | |
| IT155 | 2003 | 1 | 4 | Y | |
| CY105 | 2021 | 1 | 5 | Y | |
| CY155 | 2021 | 1 | 6 | Y | |
| AYT | #SECT/SIZE | CPBLTY | ENRLD | WAIT | SEATS | CLOSED | DETAILS | ||
| 2025 - 1 | 2 | 19 | 38 | 35 | 0 | 3 | N | Hours | |
| 2025 - 2 | 3 | 18 | 54 | 47 | 0 | 7 | N | Hours | |
| 2025 - 8 | 1 | 18 | 18 | 0 | 0 | 18 | N | Hours | |
| 2025 - 9 | 1 | 18 | 18 | 0 | 0 | 18 | N | Hours | |
| 2026 - 1 | 4 | 18 | 72 | 24 | 0 | 48 | N | Hours | |
| 2026 - 2 | 5 | 19 | 95 | 8 | 0 | 87 | N | Hours | |
| 2026 - 9 | 1 | 18 | 18 | 0 | 0 | 18 | N | Hours | |
| 2027 - 1 | 3 | 18 | 54 | 2 | 0 | 52 | N | Hours | |
| 2027 - 2 | 5 | 18 | 90 | 4 | 0 | 86 | N | Hours | |
| 2027 - 8 | 1 | 18 | 18 | 0 | 0 | 18 | N | Hours | |
| 2027 - 9 | 1 | 18 | 18 | 0 | 0 | 18 | N | Hours | |
| 2028 - 1 | 3 | 18 | 54 | 0 | 0 | 54 | N | Hours | |
| 2028 - 2 | 5 | 18 | 90 | 0 | 0 | 90 | N | Hours | |
| 2028 - 8 | 1 | 18 | 18 | 0 | 0 | 18 | N | Hours | |
| 2028 - 9 | 1 | 18 | 18 | 0 | 0 | 18 | N | Hours | |
| COURSE | TITLE | EFF YEAR | EFF TERM | DEPARTMENT | CREDIT HOURS | ||||
| EE360 | DIGITAL LOGIC W/ EMBEDDED SYS | 2013 | 2 | Electrical Engineering and Computer Science | 3.5 (BS=0.0, ET=3.5, MA=0.0) | ||||
| SCOPE | |||||||||
| This course covers the analysis, design, simulation, and construction of digital logic circuits and embedded systems. The material in this course provides the necessary tools to design digital hardware circuits such as digital clocks and locks, as well as computer hardware. The course begins with the study of binary and hexadecimal number systems, Boolean algebra, and their application to the design of combinational logic circuits. The first half of the course focuses on designs using small-scale integration (SSI) logic circuits, medium-scale integration (MSI) circuits, and programmable logic devices (PLDs) to implement combinational logic functions. The second half of the course emphasizes sequential logic circuits like counters and sequence recognizers, and also covers memory systems. Laboratory work in this half of the course focuses on using very high speed integrated circuit hardware description language (VHDL) to simulate digital systems and to program those systems into PLDs. As a final project, cadet teams design, build, and test a digital logic system such as a programmable alarm clock, digital lock, or intruder alarm. | |||||||||
|
|||||||||
| SPECIAL REQUIREMENTS: | |||||||||
| A two-part design project (0.5 design credits). | |||||||||
| TYPE | COURSE | EFF YEAR | EFF TERM | TRACK | RED BOOK FLG |
| DISQUALIFIER | |||||
| EE300 | 2004 | 1 | 1 | Y | |
| PRE REQUISITE | |||||
| CS105 | 1990 | 1 | 1 | Y | |
| CS155 | 1990 | 1 | 2 | Y | |
| IT105 | 2003 | 1 | 3 | Y | |
| IT155 | 2003 | 1 | 4 | Y | |
| COURSE | TITLE | EFF YEAR | EFF TERM | DEPARTMENT | CREDIT HOURS | ||||
| EE360 | DIGITAL COMPUTER LOGIC | 2005 | 1 | Electrical Engineering and Computer Science | 3.5 (BS=0.0, ET=3.5, MA=0.0) | ||||
| SCOPE | |||||||||
| This course covers the analysis, design, simulation, and construction of digital logic circuits and systems. The material in this course provides the necessary tools to design digital hardware circuits such as digital clocks and locks, as well as computer hardware. The course begins with the study of binary and hexadecimal number systems, Boolean algebra, and their application to the design of combinational logic circuits. The first half of the course focuses on designs using small-scale integration (SSI) logic circuits, medium-scale integration (MSI) circuits, and programmable logic devices (PLDs) to implement combinational logic functions. The second half of the course emphasizes sequential logic circuits like counters and sequence recognizers, and also covers memory systems. Laboratory work in this half of the course focuses on using very high speed integrated circuit hardware description language (VHDL) to simulate digital systems and to program those systems into PLDs. As a final project, cadet teams design, build, and test a digital logic system such as a programmable alarm clock, digital lock, or burglar alarm. | |||||||||
|
|||||||||
| SPECIAL REQUIREMENTS: | |||||||||
| A two-part design project (0.5 design credits). | |||||||||
| TYPE | COURSE | EFF YEAR | EFF TERM | TRACK | RED BOOK FLG |
| DISQUALIFIER | |||||
| EE300 | 2004 | 1 | 1 | Y | |
| PRE REQUISITE | |||||
| CS105 | 1990 | 1 | 1 | Y | |
| CS155 | 1990 | 1 | 2 | Y | |
| IT105 | 2003 | 1 | 3 | Y | |
| IT155 | 2003 | 1 | 4 | Y | |
| COURSE | TITLE | EFF YEAR | EFF TERM | DEPARTMENT | CREDIT HOURS | ||||
| EE360 | DIGITAL COMPUTER LOGIC | 2003 | 2 | Electrical Engineering and Computer Science | 3.5 (BS=0.0, ET=3.5, MA=0.0) | ||||
| SCOPE | |||||||||
| This course encompasses both the analysis and design of digital systems. The course begins with the study of combinational logic circuits in which the outputs are only a function of their current inputs. Design implementation focuses on small-scale integration (SSI) logic circuits, medium-scale integration (MSI) circuits, and programmable logic devices (PLDs) such as PROMs, PLAs and PALs. The second half of the course emphasizes sequential logic circuits in which the outputs are a function of both their current inputs and the current state of the circuit. Design implementation includes programming PLDs using the VHDL hardware description language. Cadets reinforce classroom lessons in the laboratory by designing, building, and testing digital circuits. The material in this course provides the necessary tools to design digital hardware circuits that control the internal operations of a computer. | |||||||||
|
|||||||||
| SPECIAL REQUIREMENTS: | |||||||||
| A two-part design project (0.5 design credits). | |||||||||
| TYPE | COURSE | EFF YEAR | EFF TERM | TRACK | RED BOOK FLG |
| PRE REQUISITE | |||||
| CS105 | 1990 | 1 | 1 | Y | |
| CS155 | 1990 | 1 | 2 | Y | |
| IT105 | 2003 | 1 | 3 | Y | |
| IT155 | 2003 | 1 | 4 | Y | |