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EE300 COURSE DETAILS


3 Version(s) of this Course

EE300 (Version: 2011 1) COURSE DETAILS


COURSE TITLE EFF YEAR EFF TERM DEPARTMENT CREDIT HOURS
EE300 FUNDAMENTALS OF DIGITAL LOGIC 2011 1 Electrical Engineering and Computer Science 3.0 (BS=0.0, ET=3.0, MA=0.0)
SCOPE
This is a course for non-electrical engineering majors that covers the analysis, design, simulation, and construction of digital logic circuits and systems. The material in this course provides the necessary tools to design digital hardware circuits such as clocks and security devices, as well as computer hardware. The course begins with the study of binary and hexadecimal number systems, Boolean algebra, and their application to the design of combinational logic circuits. The first half of the course focuses on combinational logic designs. The second half of the course emphasizes sequential logic circuits like memory systems, counters, and shift registers. Laboratory work reinforces the course material by requiring cadets to design and implement basic digital circuits. Throughout the course, the focus is on how the various digital hardware devices are used to perform the internal operations of a computer.
LESSONS: 34 @ 55 min (2.500 Att/wk) LABS: 6 @ 120 min
SPECIAL REQUIREMENTS:
None

EE300 COURSE REQUISITES


TYPE COURSE EFF YEAR EFF TERM TRACK RED BOOK FLG
DISQUALIFIER  
  EE360 2005 1 1 Y
PRE REQUISITE  
  IT105 2016 1 1 Y
  IT155 2016 1 2 Y
  CY105 2021 1 3 Y
  CY155 2021 1 4 Y

EE300 (Version 2011-1) COURSE OFFERINGS


AYT #SECT/SIZE CPBLTY ENRLD WAIT SEATS CLOSED DETAILS
2024 - 8 1 18 18 0 0 18 N Hours

2025 - 1 3 18 54 37 0 17 N Hours

2026 - 1 2 18 36 3 0 33 N Hours

2027 - 1 3 18 54 0 0 54 Y Hours


EE300 (Version: 2005 1) COURSE DETAILS (ARCHIVED)


COURSE TITLE EFF YEAR EFF TERM DEPARTMENT CREDIT HOURS
EE300 FUNDAMENTALS OF DIGITAL LOGIC 2005 1 Electrical Engineering and Computer Science 3.0 (BS=0.0, ET=3.0, MA=0.0)
SCOPE
This is a course for non-electrical engineering majors that covers the analysis, design, simulation, and construction of digital logic circuits and systems. The material in this course provides the necessary tools to design digital hardware circuits such as clocks and security devices, as well as computer hardware. The course begins with the study of binary and hexadecimal number systems, Boolean algebra, and their application to the design of combinational logic circuits. The first half of the course focuses on designs using small-scale integration (SSI) logic circuits, medium-scale integration (MSI) circuits, and programmable logic devices (PLDs) to implement combinational logic functions. The second half of the course emphasizes sequential logic circuits like counters and sequence recognizers, and also covers memory systems. Laboratory work in this half of the course focuses on using very high speed integrated circuit hardware description language (VHDL) to simulate digital systems and to program those systems into PLDs. Throughout the course, the focus is on how the various digital hardware devices are used to perform the internal operations of a computer.
LESSONS: 34 @ 55 min (2.500 Att/wk) LABS: 6 @ 120 min
SPECIAL REQUIREMENTS:
None

EE300 COURSE REQUISITES


TYPE COURSE EFF YEAR EFF TERM TRACK RED BOOK FLG
DISQUALIFIER  
  EE360 2005 1 1 Y

EE300 (Version: 2004 1) COURSE DETAILS (ARCHIVED)


COURSE TITLE EFF YEAR EFF TERM DEPARTMENT CREDIT HOURS
EE300 FUNDAMENTALS OF DIGITAL LOGIC 2004 1 Electrical Engineering and Computer Science 3.0 (BS=0.0, ET=3.0, MA=0.0)
SCOPE
This course encompasses the fundamentals of digital systems analysis and design with emphasis on design. In the first half of the course, cadets study combinational logic to design circuits that have outputs that are a function of their current inputs. Emphasis is placed on programmable logic devices (PLDs) such as PROMs, PLAs, PALs, and FPGAs. Cadets study sequential logic in the second half of the course to design circuits that have outputs that are a function of their current inputs as well as the current state of the circuit. Again, emphasis is placed on PLDs such as registered PLAs, registered PALs, GALs, and FPGAs. Classroom work is reinforced with laboratory exercises where cadets design, build and test digital circuits. Throughout the course, the focus is on how the various digital hardware devices are used to perform the internal operations of a computer.
LESSONS: 34 @ 55 min (2.500 Att/wk) LABS: 6 @ 120 min
SPECIAL REQUIREMENTS:
None

EE300 COURSE REQUISITES


None